Visual

Logic Design in FPGAs

Not only for image processing

Special Logic in Universal Components

Logic design with FPGAs renders specialties ready for integration. ELTEC offers:

  • Interdisciplinary experience with a variety of manufacturers:
    Xilinx, Altera, Lattice
  • Development in VHDL ensures portability beyond the limits set by manufacturers
  • Large memories in the GB range can be developed thanks to SO-DIMMs
  • Analog camera interfaces, parallel LVDS, serial LVDS, fiber optical and network-based applications
  • Customer-specific frame grabbers with image processing in FPGA
  • Interfaces for installation in cameras
  • Field bus options
  • Implementation of secure transmission logs
  • Realization of frame buffer graphics in FPGA

Image Processing

Whenever all pixels of a large image are processed using the same algorithm, pre-processing in the FPGA hardware is considered the state-of-the-art.

  • Frame grabbers are implemented right on mother-boards as part of the sensor installation
  • Image pre-processing corrects the sensor index lines
  • Handles the iconic processing (image optimization), including error corrections
  • Complexities of up to 1 million gate (logic element) equivalents
  • Pixel rates of up to 100 MP/s per channel
  • Up to 16 parallel cameras can be connected
  • Integration of SO-DIMMs (DDR2) as interim algorithm memories
  • Assumption of project responsibility for everything from the algorithm to the technical specifications description to the implementation of the project

Bus Interfaces in FPGAs

PCs use fast standard busses:PCI Express has recently replaced the parallel PCI. Both solutions can be achieved with FPGAs.

  • Bus interfaces for PCI, PCI-X and PCI Express based on IP cores
  • Utilization of verified IP cores sourced from expert providers
  • Proprietary ELTEC IP cores for Fifos and DMA controllers
  • PCI Express in widths x1, x4 and x8, depending on the preferred bandwidth.
  • Data rates ranging from 128 MB/s (PCI) to 4 GB/s (PCI Express x8)
  • Internal Fifos used to uncouple the data streams
  • DMA controller ensures that contiguous zones are present in the address space
  • DMA scripts make it possible to record MB-sized image sequences autonomously
  • Software allows for easy access to DMA data in the logical address space